IEEE

A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO ...

Abstract: This article presents a type-II sub-sampling phase-locked loop (SSPLL) that achieves low jitter, low spur, and sub-$\mu $ s locking time when synthesizing millimeter-wave (mm-wave) ...
IEEE

Single-Event Effect Characterization of 16 GHz Phase-Locked Loop in Sub-20 nm FinFET Technology

Abstract: This article proposes a radiation-tolerant phase-locked loop (PLL) for space-based applications. The proportional and integral path is proposed to mitigate the single-event effects (SEEs) ...