The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More SiFive, a processor design company pursuing the open hardware model of ...

The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized ...

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...

A new whitepaper from NEC X delves into the world of unstructured data and explores how vector processors and their optimization software can help solve the challenges of wrangling the ever-growing ...

The latest mobile phones already provide multiband and multimode operation on cellular networks. They use an increasing number of communication pipes for Wi-Fi connections, digital TV, digital audio ...

FPGA-Based Embedded Processor Supports Europe’s Leading RTOS Standard San Jose, Calif., April 3, 2007—Altera Corporation’s (NASDAQ: ALTR) Nios® II embedded processor is now supported by Vector ...

A search is underway across the industry to find the best way to speed up machine learning applications, and optimizing hardware for vector instructions is gaining traction as a key element in that ...